FPGA Workbench

Build customized FPGA solutions

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What is FPGA Workbench?

FPGA Workbench provides a complete development environment for building customized solutions based on Concurrent Real-Time’s programmable FPGA cards. FPGA Workbench includes a powerful GUI for selecting and configuring a wide range of pre-developed data acquisition and industry-specific modules to meet your application requirements.

The IP cores available for FPGA Workbench

Comprehensive IP Cores

FPGA Workbench includes a powerful library of IP modules to provide the exact functionality any application needs. The library of IP modules includes pulse width modulation, analog I/O, digital I/O, SENT protocol, encoder, ignition, injection, crank/cam shaft, wheel speed sensor and change-of-state, among many others.

Programmable FPGA Cards

Concurrent Real-Time’s family of programmable FPGA PCIe cards feature a powerful field programmable gate array that supports both digital and analog I/O. The cards can control up to 96 digital I/O signals along with 16 analog inputs and 16 analog outputs. Each card’s I/O functionality is fully customizable by the user by means of the FPGA Workbench tools. The cards are available with 362K or 504K logic elements. (Model numbers: 362K: CP-FPGA-2,  504K: CP-FPGA-3)

  • 96-channel digital I/O
  • 16-channel 16-bit digital-to-analog conversion
  • 16-channel 16-bit analog-to-digital conversion
  • Altera Arria V family FPGA
  • 1GB DRAM
  • TCXO clock source
  • 8-output programmable clock generator
  • Industry standard SCSI 68-pin VHD connectors for I/O
  • RJ-45 connectors for multi-board synchronization
  • PCI Express x4 revision 1.0a
  • Isolated power on all I/O
  • Optional NIST traceable calibration

Read more about our real-time I/O cards

Multi-Function I/O PCIe Card
Intel

Intel Altera Quartus Prime

FPGA Workbench uses the Altera Quartus Prime Standard Edition for Aria V Development software that makes it easy to customize a card to meet your exact I/O requirements. Altera tools allow users to develop and integrate their custom HDL code targeted for the Aria V FPGA on the Concurrent RealTime FPGA boards. Altera’s Qsys tool eliminates manual system integration tasks and allows you to focus on designing the custom I/O functionality you need. The Qsys system integration tool saves design time and improves productivity by automatically generating interconnect logic to connect intellectual property (IP) functions and subsystems.

Resources

Data Sheets

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